The present invention relates generally to memory storage, and more specifically, to monitoring a value in storage without repeated storage access where the value is monitored by monitoring cross-invalidate traffic from other processors.
A cache (i.e., memory) is a component that transparently retains data elements (or simply data) so that future requests for any retained data can be served faster. A data element that is stored within a cache corresponds to a storage location within a computer system memory. Such a data element might be a value that has recently been computed or a duplicate copy of the same storage location that is also stored elsewhere.
In computing, cache coherency refers to the consistency of data stored in local caches of a shared resource. When clients in a system maintain caches of a common memory resource, issues may arise with inconsistent data. This is particularly true of central processing units (CPUs) in a multiprocessing system. If one client has a copy of a memory block from a previous read and a second client changes that memory block, the first client could be left with an invalid cache of memory without any notification of the change. Cache coherency is intended to manage such conflicts and maintain consistency between the cache and system memory.